TH58NVG5S0FTA20集成電路（IC）的存儲器規(guī)格書PDF中文資料

32 GBIT (4G × 8 BIT) CMOS NAND E2PROM

DESCRIPTION

The TH58NVG5S0F is a single 3.3V 32 Gbit (36,305,895,424 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 232) bytes × 64 pages × 16384 blocks. The device has two 4328-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 4328-byte increments. The Erase operation is implemented in a single block unit (256 Kbytes + 14.5 Kbytes: 4328 bytes × 64 pages).

The TH58NVG5S0F is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage.

FEATURES

? Organization

x8

Memory cell array 4328 × 256K × 8 × 4

Register 4328 × 8

Page size 4328 bytes

Block size (256K + 14.5K) bytes

? Modes

Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,

Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read

? Mode control

Serial input/output

Command control

? Number of valid blocks

Min 16064 blocks

Max 16384 blocks

? Power supply

VCC = 2.7V to 3.6V

? Access time

Cell array to register 30 μs max

Serial Read Cycle 25 ns min (CL=100pF)

? Program/Erase time

Auto Page Program 300 μs/page typ.

Auto Block Erase 3 ms/block typ.

? Operating current

Read (25 ns cycle) 30 mA max.

Program (avg.) 30 mA max

Erase (avg.) 30 mA max

Standby 200 μA max

? Package

TSOP I 48-P-1220-0.50C

? 4bit ECC for each 512Byte is required.