LMG3526R050RQST中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

1 Features

? 650-V GaN-on-Si FET with integrated gate driver

– Integrated high precision gate bias voltage

– 200-V/ns FET hold-off

– 3.6-MHz switching frequency

– 15-V/ns to 150-V/ns slew rate for optimization

of switching performance and EMI mitigation

– Operates from 7.5-V to 18-V supply

? Robust protection

– Cycle-by-cycle overcurrent and latched shortcircuit

protection with < 100-ns response

– Withstands 720-V surge while hard-switching

– Self-protection from internal overtemperature

and UVLO monitoring

? Advanced power management

– Digital temperature PWM output

? Top-side cooled 12-mm × 12-mm VQFN package

separates electrical and thermal paths for lowest

power loop inductance

? Zero-voltage detection feature that facilitates softswitching

converters

2 Applications

? Switch-mode power converters

? Merchant network and server PSU

? Merchant telecom rectifiers

? Solar inverters and industrial motor drives

? Uninterruptible power supplies

3 Description

The LMG3526R050 GaN FET with integrated driver

and protections is targeting switch-mode power

converters and enables designers to achieve new

levels of power density and efficiency.

The LMG3526R050 integrates a silicon driver that

enables switching speed up to 150 V/ns. TI’s

integrated precision gate bias results in higher

switching SOA compared to discrete silicon gate

drivers. This integration, combined with TI's lowinductance

package, delivers clean switching and

minimal ringing in hard-switching power supply

topologies. Adjustable gate drive strength allows

control of the slew rate from 15 V/ns to 150 V/ns,

which can be used to actively control EMI and

optimize switching performance.

Advanced features include digital temperature

reporting, fault detection, and zero-voltage detection

(ZVD). The temperature of the GaN FET is reported

through a variable duty cycle PWM output. Faults

reported include overtemperature, overcurrent, and

UVLO monitoring. ZVD feature can provide a pulse

output from ZVD pin when zero-voltage switching

(ZVS) is realized.