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HD74ACT112中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書
HD74ACT112規(guī)格書詳情
Description
The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop.
When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs
may change when the clock is High and the bistable will perform according to the Truth Table as long as minimum
setup and hold times are observed. Input data is transferred to the outputs on the falling edge of the clock pulse.
Features
? Outputs Source/Sink 24 mA
? HD74ACT112 has TTL-Compatible Inputs
? Ordering Information: Ex. HD74AC112
產(chǎn)品屬性
- 型號(hào)：
HD74ACT112
- 制造商：
HITACHI
- 制造商全稱：
Hitachi Semiconductor
- 功能描述：
Dual JK Negative Edge-Triggered Flip-Flop
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
HITACHI/日立 |
23+ |
NA/ |
3260 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票 |
詢價(jià) | ||
HIT |
2020+ |
SOP14-5 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
HIT |
23+ |
SOP16 |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | ||
HIT |
99/00+ |
SOP |
2486 |
一級(jí)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
HIT |
23+ |
SOP-16 |
8890 |
價(jià)格優(yōu)勢(shì)/原裝現(xiàn)貨/客戶至上/歡迎廣大客戶來電查詢 |
詢價(jià) | ||
22+ |
5000 |
詢價(jià) | |||||
HIT |
21+ |
SOP |
2486 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
HIT |
23+ |
DIP |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣! |
詢價(jià) | ||
HIT |
22+23+ |
SOP-16 |
9130 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
HIT |
02+ |
SOP-14 |
6000 |
絕對(duì)原裝自己現(xiàn)貨 |
詢價(jià) |
