HD74AC74FPEL中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Description

The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input

Features

Asynchronous Inputs:

Low input to SD (Set) sets Q to High level

Low input to CD (Clear) sets Q to Low level

Clear and Set are independent of clock

Simultaneous Low on CD and SD makes both Q and Q High

? Outputs Source/Sink 24 mA