General Description

The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

The 74LCX126 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V VCC specifications provided

■ 5.5ns tPD max. (VCC = 3.3V), 10μA ICC max.

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal(1)

■ ±24mA output drive (VCC = 3.0V)

■ Implements proprietary noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

– Human body model > 2000V

– Machine model > 100V

■ Leadless DQFN package

74LCX126M屬于集成電路（IC） > 緩沖器，驅(qū)動器，接收器，收發(fā)器。安森美半導體公司制造生產(chǎn)的74LCX126M緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。