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零件編號(hào)	下載&訂購(gòu)	功能描述	制造商&上傳企業(yè)	LOGO
74F11	文件：72.11 Kbytes Page：8 Pages	Triple 3-input NAND gate 74F10Triple3-inputNANDgate 74F11Triple3-inputANDgate	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74F11	文件：48.32 Kbytes Page：4 Pages	Triple 3-Input AND Gate GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicANDfunction.	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F11	文件：64.269 Kbytes Page：5 Pages	Triple 3-Input AND Gate	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F112	文件：59.07 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F112	文件：83.94 Kbytes Page：10 Pages	Dual J-K negative edge-triggered flip-flop DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74F112PC	文件：59.07 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F112SC	文件：59.07 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F112SJ	文件：59.07 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F113	文件：81.65 Kbytes Page：10 Pages	Dual J-K negative edge-triggered flip-flops without reset DESCRIPTION The74F113,dualnegativeedge-triggeredJK-typeflip-flop,featuresindividualJ,K,clock(CP),set(SD)inputs,trueandcomplementaryoutputs.TheasynchronousSDinput,whenlow,forcestheoutputstothesteadystatelevelsasshowninthefunctiontableregardlessofthelevel	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74F113	文件：59.83 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F113PC	文件：59.83 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F113SC	文件：59.83 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F113SJ	文件：59.83 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop GeneralDescription The74F113offersindividualJ,K,SetandClockinputs.WhentheclockgoesHIGHtheinputsareenabledanddatamaybeentered. ThelogicleveloftheJandKinputsmaybechangedwhentheclockpulseisHIGHandtheflipflopwillperformaccordingtotheTruthTableaslo	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F114	文件：55.22 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F114	文件：51.33 Kbytes Page：6 Pages	Dual J-K negative edge-triggered flip-flop with common clock and reset DESCRIPTION The74F114,DualNegativeedge-triggeredJK-TypeFlip-Flopwithcommonclockandresetinputs,featuresindividualJ,K,Clock(CP),Set(SD)andReset(RD)inputs,trueandcomplementaryoutputs.TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable	PhilipsNXP Semiconductors 飛利浦荷蘭皇家飛利浦	Philips
74F114PC	文件：55.22 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F114SC	文件：55.22 Kbytes Page：6 Pages	Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears GeneralDescription The74F114containstwohigh-speedJKflip-flopswithcommonClockandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJandKinp	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F11PC	文件：48.32 Kbytes Page：4 Pages	Triple 3-Input AND Gate GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicANDfunction.	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F11SC	文件：48.32 Kbytes Page：4 Pages	Triple 3-Input AND Gate GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicANDfunction.	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild
74F11SC	文件：179.5 Kbytes Page：6 Pages	Triple 3-Input AND Gate GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicANDfunction.	FairchildFairchild Semiconductor 仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司	Fairchild

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詳細(xì)參數(shù)

型號(hào)：
74F11
制造商：
FAIRCHILD
制造商全稱：
Fairchild Semiconductor
功能描述：
Triple 3-Input AND Gate

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫(kù)存	備注	價(jià)格
深圳市匯萊威科技有限公司	74F11	FSC	2024	SOP	58209	16余年資質(zhì) 絕對(duì)原盒原盤(pán)代理渠道更多數(shù)量	詢價(jià)
深圳市卓越微芯電子有限公司	74F11	FSC	2020+	SOP-14	18	百分百原裝正品真實(shí)公司現(xiàn)貨庫(kù)存本公司只做原裝可	詢價(jià)
深圳市聯(lián)世界科技有限公司（原深創(chuàng)輝科技）	74F11	FAIR	1999		204	原裝正品長(zhǎng)期供貨，如假包賠包換徐小姐13714450367	詢價(jià)
深圳市歐立現(xiàn)代科技有限公司	74F11	NS	24+	SOP5.2	6980	原裝現(xiàn)貨,可開(kāi)13%稅票	詢價(jià)
深圳市一線半導(dǎo)體有限公司	74F11		24+		20		詢價(jià)
深圳市博浩通科技有限公司	74F11	NS	23+	SOP5.2	2642	全新原裝現(xiàn)貨	詢價(jià)
深圳市豪邁興電子有限公司	74F11	NS	2339+	SOP-14	25843	公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存!	詢價(jià)
深圳市亞泰盈科電子有限公司	74F11	FSC		DIP-14	27413	只做原裝貨值得信賴	詢價(jià)
深圳市永貝爾科技有限公司	74F11	FAIRCHILD	23+	NA	19960	只做進(jìn)口原裝,終端工廠免費(fèi)送樣	詢價(jià)
上海鑫科潤(rùn)電子科技有限公司	74F11	NS	90+	SOP-14	8	原裝現(xiàn)貨海量庫(kù)存歡迎咨詢	詢價(jià)

更多74F11供應(yīng)商更新時(shí)間2024-10-23 16:40:00

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