X68C64S中文資料Xicor數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The X68C64 is an 8K x 8 E2PROM fabricated with advanced CMOS Textured Poly Floating Gate Technology. The X68C64 features a Multiplexed Address and Data bus allowing a direct interface to a variety of popular single-chip microcontrollers operating in expanded multiplexed mode without the need for additional interface circuitry.

FEATURES

?CONCURRENT READ WRITE?

—Dual Plane Architecture

—Isolates Read/Write Functions Between Planes

—Allows Continuous Execution of Code From One Plane While Writing in the Other Plane

?Multiplexed Address/Data Bus

—Direct Interface to Popular 8-bit Microcontrollers, e.g., Motorola M6801/03, M68HC11 Family

?High Performance CMOS

—Fast Access Time, 120ns

—Low Power

—60mA Maximum Active

—500μA Maximum Standby

?Software Data Protection

?Block Protect Register

—Individually Set Write Lock Out in 1K Blocks

?Toggle Bit Polling

—Early End of Write Detection

?Page Mode Write

—Allows up to 32 Bytes to be Written in One Write Cycle

?High Reliability

—Endurance: 100,000 Write Cycles

—Data Retention: 100 Years