VSC8114QB中文資料VITESSE數(shù)據(jù)手冊PDF規(guī)格書

General Description

The VSC8114 is an ATM/SONET/SDH compatible transceiver integrating an on-chip Clock Multiplication Unit (PLL) for high speed clock generation as well as a Clock and data Recovery Unit (CRU) with 8-bit serial-to-parallel and parallel-to-serial data conversion. The PLL clock is used for serialization in the transmit direction (Mux). The recovered clock is used for deserialization in the receive direction (Demux). The demultiplexer contains SONET/SDH frame detection and recovery. In addition, the device provides both facility and equipment loopback modes and a loop time mode. The part is packaged in a 100PQFP with an integrated heat spreader for optimum thermal performance and reduced cost. The VSC8114 provides an integrated solution for ATM physical layers and SONET/SDH systems applications.

Features

? Loss of Signal (LOS) Input & LOS Detection

? +3.3V/5V Programmable PECL Serial Interface

? Provides Equipment, Facilities and Split

Loopback Modes as well as Loop Timing Mode

? Provide PECL Reference Clock Inputs

? Meets Bellcore, ITU and ANSI Specifications

for Jitter Performance

? Low Power - 0.9Watts Typical

? 100 PQFP Package

? Operates at STS-12/STM-4 (622.08Mb/s)

Data Rate

? Compatible with Industry ATM UNI Devices

? On Chip Clock Generation of the 622.08MHz

High Speed Clock (Mux)

? On Chip Clock Recovery of the 622.08MHz

High Speed Clock (Demux)

? 8-Bit Parallel TTL Interface with Parity Error

Detection and Generation

? SONET/SDH Frame Recovery