TQ8105中文資料TriQuint數(shù)據(jù)手冊(cè)PDF規(guī)格書

The TQ8105/TQ8106 are SONET/SDH transceivers that integrate multiplexing, demultiplexing, SONET/SDH framing, clock-synthesis PLL, and enhanced line and clock diagnostic functions into a single monolithic device. The TQ8106 is a pin-compatible upgrade of the TQ8105 that includes a Clock and Data Recovery (CDR) function. The TQ8105 and TQ8106 allow maximum flexibility in the selection of internal/external Clock and Data Recovery, Opto-Electronic (O/E) Module, and Reference Clock Sources.

Features

? Single-chip, byte-wide Mux, Demux, Framer, and Tx clocksynthesis PLL with enhanced diagnostics

? TQ8106 includes monolithic Clock and Data Recovery

? SONET/SDH/ATM compliant for STS-12/STM-4 (622 Mb/s) or STS-3/STM-1 (155 Mb/s) rates

? 155.52, 77.76, 51.84, 38.88, or 19.44 MHz reference clock inputs with TTL, PECL, or ECL level

? 38.88 MHz and 51.84 MHz clock outputs for UTOPIA as well as byte clock rate (77.76 or 19.44 MHz)

? External RC-based loop filters

? Integrated loopbacks with enhanced line and reference clock diagnostics

? Direct-coupled standard, PECL, high-speed I/O with ECL option

? Clean TTL interface to PMC-Sierra devices

? 100-pin 14x14 mm JEDEC plastic package

? +5V-only supply for PECL I/O (–5.2V required for ECL I/O option)

? –40 to +125°C case operating temperature