TMS320LC206

數(shù)字信號處理器; ? High-Performance Static CMOS Technology\n? Includes the '320C2xLP Core CPU\n? TMS320C206, TMS320LC206 are Members of the 'C20x/'C2000 Platform Which Also Includes the TMS320C203/LC203 and TMS320F206 Devices\n? Instruction-Cycle Time 25 ns at 3.3 V\n? Source Code Compatible With TMS320C25 and other '20x Devices\n? Upwardly Code-Compatible With TMS320C5x Devices\n? Four External Interrupts\n? TMS320C206, 5-V I/O (3.3-V core)\n? TMS320LC206, 3.3-V core and I/O\n? TMS320C206, TMS320LC206 Integrated Memory: \n? 544 × 16 Words of On-Chip Dual-Access Data RAM\n? 32K × 16 Words of On-Chip ROM\n? 4K × 16 Words of On-Chip Single-Access Program/Data RAM\n \n? 224K × 16-Bit Maximum Addressable External Memory Space \n? 64K Program\n? 64K Data\n? 64K Input/Output (I/O)\n? 32K Global\n \n? 32-Bit Arithmetic Logic Unit (ALU) Accumulator\n? 16 × 16-Bit Multiplier With a 32-Bit Product\n? Block Moves from Data and Program Space\n? TMS320C206, TMS320LC206 Peripherals: \n? On-Chip 20-Bit Timer\n? On-Chip Software-Programmable Wait-State (0 to 7) Generator\n? On-Chip Oscillator\n? On-Chip Phase-Locked Loop (PLL)\n? Six General-Purpose I/O Pins\n? Full-Duplex Asynchronous Serial Port (UART)\n? Enhanced Synchronous Serial Port (ESSP) With Four-Level-Deep FIFOs\n \n? Input Clock Options \n? Options: Multiply-by-One, -Two, or -Four, and Divide-by-Two ( 1, 2, 4, and 2)\n \n? Support of Hardware Wait States\n? Power Down IDLE Mode\n? IEEE 1149.1-Compatible Scan-Based Emulation\n? TMS320C206, TMS320LC206 100-Pin PZ Package, Small Thin Quad Flat Package (TQFP)\n? Industrial Temperature Version Planned, (- 40°C to 85°C) IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port Device numbers are hereafter referred to in the data sheet as 'C206, unless otherwise specified. TI is a trademark of Texas Instruments Incorporated.;

The Texas Instruments (TITM) TMS320C206 digital signal processors (DSPs) are fabricated with static CMOS integrated-circuit technology. The architectural design is based upon that of the TMS320C20x series and is optimized for low-power operation. The combination of advanced Harvard architecture, on-chip peripherals, on-chip memory, and a highly specialized instruction set is the basis of the operational flexibility and speed of the 'C206. The 'C206 offers these advantages: Enhanced TMS320 architectural design for increased performance and versatility Advanced integrated-circuit processing technology for increased performance 'C206 devices are pin- and code-compatible with 'C203 and 'F206 devices. Source code for the 'C206 DSPs is software-compatible with the 'C1x and 'C2x DSPs and is upwardly compatible with fifth-generation DSPs ('C5x) New static-design techniques for minimizing power consumption and increasing radiation tolerance

TMS320LC206

DIGITAL SIGNAL PROCESSORS

TMS320LC206

DIGITAL SIGNAL PROCESSORS

TMS320LC206PZ

DIGITAL SIGNAL PROCESSORS

TMS320LC206PZ80

DIGITAL SIGNAL PROCESSORS

TMS320LC206PZA80

DIGITAL SIGNAL PROCESSORS

TMS320LC206PZ80

Package：100-LQFP；包裝：管件 類別：集成電路（IC） DSP（數(shù)字信號處理器） 描述：IC CMOS DSP 100LQFP

TMS320LC206PZA80

Package：100-LQFP；包裝：托盤 類別：集成電路（IC） DSP（數(shù)字信號處理器） 描述：IC CMOS DSP 100LQFP