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THC63LVD104A規(guī)格書詳情
General Description
The THC63LVD104A receiver is designed to support pixel data transmission between Host and Flat Panel Display from NTSC up to WXGA resolutions. The THC63LVD104A converts the LVDS data streams back into 35bits of CMOS/TTL data with rising edge or falling edge clock for convenient with a variety of LCD panel controllers.At a transmit clock frequency of 90MHz, 30bits of RGB data and 5bits of timing andcontrol data (HSYNC,VSYNC,DE,CNTL1,CNTL2) are transmitted at an effective rate of 630Mbps per LVDS channel.Using a 90MHz clock, the data through put is 394Mbytes per second.
Features
? Wide dot clock range: 8-90MHz suited for NTSC,VGA, SVGA, XGA, and WXGA
? PLL requires no external components
? 50 output clock duty cycle
? TTL clock edge programmable
? Power down mode
? Low power single 3.3V CMOS design
? 64pin TQFP
? Backward compatible with THC63LVDF64x (18bits) / F84x(24bits)
產(chǎn)品屬性
- 型號(hào)：
THC63LVD104A
- 功能描述：
90MHz 30Bits COLOR LVDS Receiver
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
23+ |
TQFP-64 |
20000 |
原廠原裝正品現(xiàn)貨 |
詢價(jià) | |||
THINE |
24+ |
TQFP |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
THINE |
21+ |
QFP |
10000 |
全新原裝 公司現(xiàn)貨 價(jià)格優(yōu) |
詢價(jià) | ||
THINE |
NA |
8560 |
一級(jí)代理 原裝正品假一罰十價(jià)格優(yōu)勢(shì)長(zhǎng)期供貨 |
詢價(jià) | |||
THINE |
2022+ |
QFP64 |
20000 |
只做原裝進(jìn)口現(xiàn)貨.假一罰十 |
詢價(jià) | ||
THINE |
20+ |
QFP |
500 |
樣品可出,優(yōu)勢(shì)庫存歡迎實(shí)單 |
詢價(jià) | ||
THINE |
23+ |
QFP |
65480 |
詢價(jià) | |||
THINE |
2020+ |
QFP48 |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
THINE |
24+ |
N/P |
16500 |
代理授權(quán)直銷,原裝現(xiàn)貨,假一罰十,長(zhǎng)期穩(wěn)定供應(yīng) |
詢價(jià) | ||
THINE |
23+ |
QFP |
7750 |
全新原裝優(yōu)勢(shì) |
詢價(jià) |
