STM32MP251A

MPU with Arm Cortex-A35 @1.2GHz, Cortex-M33 @400MHz, 1xEthernet

STM32MP25xA/D devices are based on the high-performance single or dual-core Arm? Cortex?-A35 64-bit RISC core operating at up to 1.5?GHz. The Cortex??A35 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU, and a 512-Kbyte L2 cache. The Cortex??A35 ; ? Includes ST state-of-the-art patented technology. \n? Cores \n ?Up to 64-bit dual-core Arm? Cortex?-A35? Up to 1.5?GHz\n? 32-Kbyte I + 32-Kbyte D level 1 cache for each core\n? 512-Kbyte unified level 2 cache\n? Arm? NEON? and Arm? TrustZone? \n \n ?32-bit Arm? Cortex?-M33 with FPU/MPU? Up to 400?;

STM32MP251A

Arm? based dual Cortex?-A35 1.5 GHz Cortex?-M33 MPU, AI, 3D GPU, video encoder/decoder, TFT/DSI/LVDS, USB 3.0, PCIe?

Features IncludesSTstate-of-the-artpatentedtechnology. Cores ?Upto64-bitdual-coreArm?Cortex?-A35 –Upto1.5GHz –32-KbyteI+32-KbyteDlevel1cacheforeachcore –512-Kbyteunifiedlevel2cache –Arm?NEON?andArm?TrustZone? ?32-bitArm?Cortex?-M33withFPU/MPU –Upt

STM32MP251A

Arm? based dual Cortex?-A35 1.5 GHz Cortex?-M33 MPU, AI, 3D GPU, video encoder/decoder, TFT/DSI/LVDS, USB 3.0, PCIe?

Features IncludesSTstate-of-the-artpatentedtechnology. Cores ?Upto64-bitdual-coreArm?Cortex?-A35 –Upto1.5GHz –32-KbyteI+32-KbyteDlevel1cacheforeachcore –512-Kbyteunifiedlevel2cache –Arm?NEON?andArm?TrustZone? ?32-bitArm?Cortex?-M33withFPU/MPU –Upt

STM32MP251A_V01

Arm? based dual Cortex?-A35 1.5 GHz Cortex?-M33 MPU, AI, 3D GPU, video encoder/decoder, TFT/DSI/LVDS, USB 3.0, PCIe?

Features IncludesSTstate-of-the-artpatentedtechnology. Cores ?Upto64-bitdual-coreArm?Cortex?-A35 –Upto1.5GHz –32-KbyteI+32-KbyteDlevel1cacheforeachcore –512-Kbyteunifiedlevel2cache –Arm?NEON?andArm?TrustZone? ?32-bitArm?Cortex?-M33withFPU/MPU –Upt

STM32P301VCMCO

ST/意法

ST/意法