STM32L4S5QI

帶FPU的超低功耗120 MHz Arm Cortex-M4 MCU，具有2048 KB Flash存儲器、USB OTG、DFSDM、CHROM-ART、AES-256和HASH; ? Ultra-low-power with FlexPowerControl \n ?1.71 V to 3.6 V power supply \n ?-40 °C to 85/125 °C temperature range \n ?Batch acquisition mode (BAM) \n ?305 nA in VBAT mode: supply for RTC and 32x32-bit backup registers \n ?33 nA Shutdown mode (5 wakeup pins) \n ?125 nA Standby mode (5 wakeup pins) \n ?420 nA Standby mode with RTC \n ?2.8 μA Stop 2 with RTC \n ?110 μA/MHz Run mode \n ?5 μs wakeup from Stop mode \n ?Brownout reset (BOR) in all modes except Shutdown \n ?Interconnect matrix \n? Core: Arm? 32-bit Cortex?-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 120 MHz, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions \n? Performance benchmark \n ?1.25 DMIPS/MHz (Drystone 2.1) \n ?409.20 CoreMark? (3.41 CoreMark/MHz @120 MHz) \n? Energy benchmark \n ?233 ULPMark?CP score \n ?56.5 ULPMark?PP score \n? Clock sources \n ?4 to 48 MHz crystal oscillator \n ?32 kHz crystal oscillator for RTC (LSE) \n ?Internal 16 MHz factory-trimmed RC (±1%) \n ?Internal low-power 32 kHz RC (±5%) \n ?Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy) \n ?Internal 48 MHz with clock recovery \n ?3 PLLs for system clock, USB, audio, ADC \n? RTC with hardware calendar, alarms and calibration \n? Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors \n? Advanced graphics features \n ?Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation \n ?Chrom-GRC (GFXMMU) allowing up to 20% of graphic resources optimization \n ?MIPI? DSI Host controller with two DSI lanes running at up to 500 Mbit/s each \n ?LCD-TFT controller \n? 16x timers: 2 x 16-bit advanced motor-control, 2 x 32-bit and 5 x 16-bit general purpose, 2x 16-bit basic, 2x low-power 16-bit timers (available in Stop mode), 2x watchdogs, SysTick timer \n? Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V? Memories \n ?2-Mbyte Flash, 2 banks read-while-write, proprietary code readout protection \n ?640 Kbytes of SRAM including 64 Kbytes with hardware parity check \n ?External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories \n ?2 x Octo-SPI memory interface \n? 4x digital filters for sigma delta modulator \n? Rich analog peripherals (independent supply) \n ?12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 μA/Msps \n ?2x 12-bit DAC, low-power sample and hold \n ?2x operational amplifiers with built-in PGA \n ?2x ultra-low-power comparators \n? 20x communication interfaces \n ?USB OTG 2.0 full-speed, LPM and BCD \n ?2x SAIs (serial audio interface) \n ?4x I2C FM+(1 Mbit/s), SMBus/PMBus \n ?6x USARTs (ISO 7816, LIN, IrDA, modem) \n ?3x SPIs (5x SPIs with the dual Octo-SPI) \n ?CAN (2.0B Active) and SDMMC \n? 14-channel DMA controller \n? True random number generator \n? CRC calculation unit, 96-bit unique ID \n? 8- to 14-bit camera interface up to 32 MHz (black and white) or 10 MHz (color) \n? Encryption hardware accelerator: AES (128/256-bit key), HASH (SHA-256) \n? Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell? (ETM);

The STM32L4S5xx, STM32L4S7xx and STM32L4S9xx devices are an ultra-low-power microcontrollers family (STM32L4+ Series) based on the high-performance Arm? Cortex?-M4 32-bit RISC core. They operate at a frequency of up to 120 MHz. \n\n The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm? single-precision data-processing instructions and all the data types. The Cortex-M4 core also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.\n\n These devices embed high-speed memories (2 Mbytes of Flash memory and 640 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), two OctoSPI Flash memories interface (available on all packages) and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.\n\n The STM32L4Sxxx devices embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, proprietary code readout protection and a firewall.\n\n These devices offer a fast 12-bit ADC (5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timer, two 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and two 16-bit low-power timers. The devices support four digital filters for external sigma delta modulators (DFSDM). In addition, up to 24 capacitive sensing channels are available. \n\n They also feature standard and advanced communication interfaces such as: four I2Cs, three SPIs, three USARTs, two UARTs and one low-power UART, two SAIs, one SDMMC, one CAN, one USB OTG full-speed, one camera interface and DMA2D controller.\n\n The STM32L4S5xx, STM32L4S7xx and STM32L4S9xx devices embed an AES and a HASH hardware accelerator.\n\n The devices operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications.\n\n Some independent power supplies are supported like an analog independent supply input for ADC, DAC, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os, which can be supplied independently down to 1.08 V. A VBAT input allows to backup the RTC and backup the registers. \n\n The STM32L4Sxxx family offers six packages from 100-pin to 169-pin.\n\n

STM32L4S5

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