SP8853/AC/DG中文資料ZARLINK數(shù)據(jù)手冊PDF規(guī)格書

The SP8853 is a low power single chip synthesiser intended for professional radio applications, containing all the elements (apart from the loop amplifier) required to build a PLL frequency synthesis loop.

The device is serially programmable by a three-wire data highway and contains three independent buffers to store one reference divider word and two local oscillator divider words. A digital phase detector with two charge pumps, programmable in phase and gain, are provided to improve lock-up performance. The preset operation of the charge pumps can be overwritten or the comparison frequencies switched to output ports under control of the divider word. The dual modulus ratio and so operating range is also programmable through the same word.

FEATURES

■ Improved Digital Phase Detector Eliminates ‘Dead Band’ Effects

■ Low Operating Power, Typically 175mW

■ 1·3GHz Operating Frequency

■ Complete Phase Locked Loop

■ High Input Sensitivity

■ Programmed throughThree-Wire Bus

■ Wide Range of Reference Division Ratios

■ Local Storage for Two Frequency Words, giving Rapid Frequency Toggling

■ Programmable Phase Detector Gain

■ Power Down Mode