SN74AHC165BQBR中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? Operating range 2-V to 5.5-V VCC

? Low delay, 6 ns (25°C, 5 V)

? Latch-up performance exceeds 250 mA

per JESD 17

2 Applications

? Network switches

? Power infrastructures

? LED displays

? Servers

3 Description

The SN74AHC165 device contains an 8-bit serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel 3-

state outputs. Separate clocks are provided for both

the shift and storage registers. The shift register has

a direct overriding clear (SRCLR) input, a serial (SER)

input, and a serial output for cascading. When the

output-enable (OE) input is high, all outputs except

QH′ are in the high-impedance state.