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SL74HCT373D中文資料SLS數(shù)據(jù)手冊(cè)PDF規(guī)格書
| 廠商型號(hào) |
SL74HCT373D |
| 功能描述 | Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS) |
| 文件大小 |
52.61 Kbytes |
| 頁(yè)面數(shù)量 |
5 頁(yè) |
| 生產(chǎn)廠商 | System Logic Semiconductor |
| 企業(yè)簡(jiǎn)稱 |
SLS |
| 中文名稱 | System Logic Semiconductor官網(wǎng) |
| 原廠標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-1-15 15:04:00 |
SL74HCT373D規(guī)格書詳情
Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS
The SL74HCT373 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs.
The SL74HCT373 is identical in pinout to the LS/ALS373.
The eight latches of the SL74HCT373 are transparent D-type latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched.
The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled.
? TTL/NMOS-Compatible Input Levels
? Outputs Directly Interface to CMOS, NMOS, and TTL
? Operating Voltage Range: 4.5 to 5.5 V
? Low Input Current: 1.0 μA
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
SLS |
24+ |
SOP |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
SLS |
22+ |
SOP14 |
12000 |
只做原裝、原廠優(yōu)勢(shì)渠道、假一賠十 |
詢價(jià) | ||
SLKOR(薩科微) |
24+ |
con |
10000 |
查現(xiàn)貨到京北通宇商城 |
詢價(jià) | ||
SLS |
23+ |
SOP14 |
6850 |
只做原廠原裝正品現(xiàn)貨!假一賠十! |
詢價(jià) | ||
ST |
23+ |
DIP-24 |
16900 |
正規(guī)渠道,只有原裝! |
詢價(jià) | ||
TI |
23+ |
NA |
1335 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
SLS |
24+ |
SOP14 |
990000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
ST |
22+ |
DIP-24 |
16900 |
支持樣品 原裝現(xiàn)貨 提供技術(shù)支持! |
詢價(jià) | ||
SLKOR/薩科微 |
30000 |
原裝現(xiàn)貨,全系列可訂貨 |
詢價(jià) | ||||
HYNIX |
24+ |
SOP-7.2-20P |
4897 |
絕對(duì)原裝!現(xiàn)貨熱賣! |
詢價(jià) |
