SI5341集成電路（IC）的時(shí)鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

Low-Jitter, 10 or 4-Output, Any-Frequency, Any-Output Clock Generator

The any-frequency, any-output Si5341/40 clock generators combine a wide-band PLL with proprietary MultiSynth? fractional synthesizer technology to offer a versatile and high performance clock generator platform. This highly flexible architecture is capable of synthesizing a wide range of integer and non-integer related frequencies up to 1 GHz on 10 differential clock outputs while delivering sub-100 fs rms phase jitter performance with 0 ppm error. Each of the clock outputs can be assigned its own format and output voltage enabling the Si5341/40 to replace multiple clock ICs and oscillators with a single device making it a true clock tree on a chip.

KEY FEATURES

? Generates any combination of output

frequencies from any input frequency

? Ultra-low jitter of 90 fs rms

? Input frequency range:

? External crystal: 25 to 54 MHz

? Differential clock: 10 to 750 MHz

? LVCMOS clock: 10 to 250 MHz

? Output frequency range:

? Differential: 100 Hz to 1028 MHz

? LVCMOS: 100 Hz to 250 MHz

? Highly configurable outputs compatible with

LVDS, LVPECL, LVCMOS, CML, and HCSL

with programmable signal amplitude

? Si5341: 4 input, 10 output, 64-QFN 9x9 mm

? Si5340: 4 input, 4 output, 44-QFN 7x7 mm

Applications:

? Clock tree generation replacing XOs, buffers, signal format translators

? Any-frequency clock translation

? Clocking for FPGAs, processors, memory

? Ethernet switches/routers

? OTN framers/mappers/processors

? Test equipment and instrumentation

? Broadcast video