Features

? Twelve 0.7 V low-power, pushpull,

HCSL-compatible

PCIe Gen 3 outputs

? Individual OE HW pins for each

output clock

? 100 MHz /133 MHz PLL

operation, supports PCIe and

QPI

? PLL bandwidth SW SMBUS

programming overrides the latch

value from HW pin

? 9 selectable SMBUS addresses

? SMBus address configurable to

allow multiple buffers in a single

control network 3.3 V supply

voltage operation

? Integrated termination resistors

supporting 85 ??transmission

lines

? PLL or bypass mode

? Spread spectrum tolerable

? 1.05 to 3.3 V I/O supply voltage

? 50 ps output-to-output skew

? 50 ps cyc-cyc jitter (PLL mode)

? Low phase jitter (Intel QPI, PCIe

Gen 1/2/3/4 common clock

compliant)

? Gen 3 SRNS Compliant

? 100 ps input-to-output delay

? Extended Temperature:

–40 to 85 °C

? Package: 64-pin QFN

? For higher output devices or

variations of this device, contact

Skyworks Solutions

SI53112-A03AGMR屬于集成電路（IC） > 應(yīng)用特定時鐘/定時。美國思佳訊公司制造生產(chǎn)的SI53112-A03AGMR應(yīng)用特定時鐘/定時專用時鐘和計時 IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂總線等。