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PZ3032I10BC中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書

PZ3032I10BC
廠商型號

PZ3032I10BC

功能描述

32 macrocell CPLD

文件大小

116.38 Kbytes

頁面數(shù)量

14

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-14 15:50:00

PZ3032I10BC規(guī)格書詳情

DESCRIPTION

The PZ3032 CPLD (Complex Programmable Logic Device) is the first in a family of Fast Zero Power (FZP?) CPLDs from Philips Semiconductors. These devices combine high speed and zero power in a 32 macrocell CPLD. With the FZP? design technique, the PZ3032 offers true pin-to-pin speeds of 8ns, while simultaneously delivering power that is less than 35μA at standby without the need for ‘turbo bits’ or other power down schemes. By replacing conventional sense amplifier methods for implementing product terms (a technique that has been used in PLDs since the bipolar era) with a cascaded chain of pure CMOS gates, the dynamic power is also substantially lower than any competing CPLD – 70 lower at 50MHz.

FEATURES

? Industry’s first TotalCMOS? PLD – both CMOS design and process technologies

? Fast Zero Power (FZP?) design technique provides ultra-low power and very high speed

? High speed pin-to-pin delays of 8ns

? Ultra-low static power of less than 35μA

? Dynamic power that is 70 lower at 50MHz than competing devices

? 100 routable with 100 utilization while all pins and all macrocells are fixed

? Deterministic timing model that is extremely simple to use

? 2 clocks with programmable polarity at every macrocell

? Support for complex asynchronous clocking

? Innovative XPLA? architecture combines high speed with extreme flexibility

? 1000 erase/program cycles guaranteed

? 20 years data retention guaranteed

? Logic expandable to 37 product terms

? PCI compliant

? Advanced 0.5μ E2CMOS process

? Security bit prevents unauthorized access

? Design entry and verification using industry standard and Philips CAE tools

? Reprogrammable using industry standard device programmers

? Innovative Control Term structure provides either sum terms or product terms in each logic block for:

– Programmable 3-State buffer

– Asynchronous macrocell register preset/reset

? Programmable global 3-State pin facilitates ‘bed of nails’ testing without using logic resources

? Available in both PLCC and TQFP packages

產(chǎn)品屬性

  • 型號:

    PZ3032I10BC

  • 功能描述:

    Electrically-Erasable Complex PLD

供應商 型號 品牌 批號 封裝 庫存 備注 價格
PIHLIPS
589220
16余年資質(zhì) 絕對原盒原盤 更多數(shù)量
詢價
PHI
24+
PQFP44
3629
原裝優(yōu)勢!房間現(xiàn)貨!歡迎來電!
詢價
PHILIPS
24+
QFP
35200
一級代理/放心采購
詢價
PHILIPS
23+
PLCC44
12300
詢價
PIHLIPS
QFP44
30407
集團化配單-有更多數(shù)量-免費送樣-原包裝正品現(xiàn)貨-正規(guī)
詢價
PHI
22+
QFP
3000
原裝現(xiàn)貨
詢價
PH
23+
ZIP
5000
原裝正品,假一罰十
詢價
PIHLIPS
2020+
QFP44
80000
只做自己庫存,全新原裝進口正品假一賠百,可開13%增
詢價
PHILIPS
16+
TQFP
985
進口原裝現(xiàn)貨/價格優(yōu)勢!
詢價
PHILIPS
23+
QFP
5700
絕對全新原裝!現(xiàn)貨!特價!請放心訂購!
詢價