PR31500中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

PR31500 Processor is a single-chip, low-cost, integrated embedded processor consisting of MIPS R3000 core and system support logic to interface with various types of devices.

PR31500 consists of a MIPS R3000 RISC CPU with 4 KBytes of instruction cache memory and 1 KByte of data cache memory, plus integrated functions for interfacing to numerous system components and external I/O modules. The R3000 RISC CPU is also augmented with a multiply/accumulate module to allow integrated DSP functions, such as a software modem for high-performance standard data and fax protocols.

FEATURES

? 32-bit R3000 RISC static CMOS CPU

? 4 KByte instruction cache

? 1 KByte data cache

? Multiply/accumulator Instruction

? R3000A memory management unit with on-chip TLB

? Supports Big/Little Endian operating systems

? On-chip peripherals with individual power-down

– Multi-channel DMA controller

– Bus interface unit

– Memory controller for ROM, Flash, RAM, DRAM, SDRAM, SRAM, and PCMCIA

– Power management module

– Video module

– Real-time clock 32.760KHz reference

– High-speed serial interface

– Infrared module

– Dual-UART

– SPI bus

? 3.3V supply voltage

? 208-pin LQFP (Low profile quad flat pack)

? 40MHz operation frequency