PIC18F442-ESLASHP中文資料微芯科技數(shù)據(jù)手冊(cè)PDF規(guī)格書

DEVICE OVERVIEW

This document contains device specific information for the following devices:

? PIC18F242 ? PIC18F442

? PIC18F252 ? PIC18F452

These devices come in 28-pin and 40/44-pin packages. The 28-pin devices do not have a Parallel Slave Port (PSP) implemented and the number of Analog-to Digital (A/D) converter input channels is reduced to 5. An overview of features is shown in Table 1-1.

High Performance RISC CPU:

? C compiler optimized architecture/instruction set

- Source code compatible with the PIC16 and PIC17 instruction sets

? Linear program memory addressing to 32 Kbytes

? Linear data memory addressing to 1.5 Kbytes

? Up to 10 MIPs operation:

- DC - 40 MHz osc./clock input

- 4 MHz - 10 MHz osc./clock input with PLL active

? 16-bit wide instructions, 8-bit wide data path

? Priority levels for interrupts

? 8 x 8 Single Cycle Hardware Multiplier

Peripheral Features:

? High current sink/source 25 mA/25 mA

? Three external interrupt pins

? Timer0 module: 8-bit/16-bit timer/counter with 8-bit programmable prescaler

? Timer1 module: 16-bit timer/counter

? Timer2 module: 8-bit timer/counter with 8-bit period register (time-base for PWM)

? Timer3 module: 16-bit timer/counter

? Secondary oscillator clock option - Timer1/Timer3

? Two Capture/Compare/PWM (CCP) modules.

CCP pins that can be configured as:

- Capture input: capture is 16-bit, max. resolution 6.25 ns (TCY/16)

- Compare is 16-bit, max. resolution 100 ns (TCY)

- PWM output: PWM resolution is 1- to 10-bit, max. PWM freq. @: 8-bit resolution = 156 kHz

10-bit resolution = 39 kHz

? Master Synchronous Serial Port (MSSP) module, Two modes of operation:

- 3-wire SPI? (supports all 4 SPI modes)

- I2C? Master and Slave mode

? Addressable USART module:

- Supports RS-485 and RS-232

? Parallel Slave Port (PSP) module

Analog Features:

? Compatible 10-bit Analog-to-Digital Converter module (A/D) with:

- Fast sampling rate

- Conversion available during SLEEP

- Linearity ≤ 1 LSb

? Programmable Low Voltage Detection (PLVD)

- Supports interrupt on-Low Voltage Detection

? Programmable Brown-out Reset (BOR)

Special Microcontroller Features:

? 100,000 erase/write cycle Enhanced FLASH program memory typical

? 1,000,000 erase/write cycle Data EEPROM memory

? FLASH/Data EEPROM Retention: > 40 years

? Self-reprogrammable under software control

? Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)

? Watchdog Timer (WDT) with its own On-Chip RC Oscillator for reliable operation

? Programmable code protection

? Power saving SLEEP mode

? Selectable oscillator options including:

- 4X Phase Lock Loop (of primary oscillator)

- Secondary Oscillator (32 kHz) clock input

? Single supply 5V In-Circuit Serial Programming? (ICSP?) via two pins

? In-Circuit Debug (ICD) via two pins

CMOS Technology:

? Low power, high speed FLASH/EEPROM technology

? Fully static design

? Wide operating voltage range (2.0V to 5.5V)

? Industrial and Extended temperature ranges

? Low power consumption:

- < 1.6 mA typical @ 5V, 4 MHz

- 25 μA typical @ 3V, 32 kHz

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