PCA9560集成電路（IC）的專用規(guī)格書PDF中文資料

DESCRIPTION

The PCA9560 is a 20-pin CMOS device consisting of two 6-bit non-volatile EEPROM registers, 5 hardware pin inputs and a 5-bit multiplexed output with one latched EEPROM bit. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configuration, where 3 preset values (2 sets of internal non-volatile registers and 1 set of external hardware pins) set processor voltage for operation in either performance, deep sleep or deeper sleep modes. The PCA9560 is also useful in server and telecom/networking applications when used to replace DIP switches or jumpers, since the settings can be easily changed via I2C/SMBus without having to power down the equipment to open the cabinet. The non-volatile memory retains the most current setting selected before the power is turned off

FEATURES

? 5-bit 3-to-1 multiplexer, 1-bit latch DIP switch

? 5-bit external hardware pins

? Two 6-bit internal non-volatile registers, fully pin-to-pin compatible with PCA9559

? Selection between the two non-volatile registers

? Selection between non-volatile registers and external hardware pins

? I2C/SMBus interface logic

? Internal pull-up resistors on input pin and control signals

? Active high write protect on input controls the ability to write to the non-volatile registers

? 2 address pins, allowing up to 4 devices on the I2C-bus

? 5 open drain multiplexed outputs

? Open drain non-multiplexed output

? Internal 6-bit non-volatile registers programmable and readable via I2C-bus

? External hardware 5-bit value readable via I2C-bus

? Multiplexer selection can be overridden by I2C-bus

? Operating power supply voltage 3.0 V to 3.6 V

? 5 V and 2.5 V tolerant inputs

? 0 to 400 kHz clock frequency

? ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101

? Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA.

? Package offering: SO 20, TSSOP 20