PCA5010H中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The PCA5010 pager baseband controller is manufactured in an advanced CMOS/OTP technology.

The PCA5010 is an 8-bit microcontroller especially suited for pagers. For this purpose, features such as a 4 or 2 level FSK demodulator, filter, clock recovery, protocol timer, DC/DC converter optimized for small paging systems and RTC are integrated on-chip.

The device is optimized for low power consumption. The PCA5010 has several software selectable modes for power reduction: Idle and Power-down mode of the microcontroller and Standby and OFF mode of the DC/DC converter.

FEATURES

? Operating temperature range: ?10 to +55 °C

? Supply voltage range with on-chip DC/DC converter: 0.9 to 1.6 V

? Low operating and standby current consumption

? On-chip DC/DC converter generates the supply voltage for the PCA5010 and external circuitry from a single cell battery

? Battery low detector

? Low electromagnetic noise emission

? Full static asynchronous 80C51 CPU (8-bit CPU)

? Recovery from lowest power standby Idle mode to full speed operation within microseconds

? 32 kbytes of One-Time Programmable (OTP) memory and 1.25 kbyte of RAM on-chip

? 27 general purpose I/O port lines (4 ports with interrupt possibility)

? 15 different interrupt sources with selectable priority

? 2 standard timer/event counters T0 and T1

? I2C-bus serial port (single 100/400 kHz master transmitter and receiver)

? Subset of standard UART serial port (8-bit and 9-bit transmission at 4800/9600 bits/s)

? 76.8 kHz crystal oscillator reference with digital clock correction for real time and paging protocol

? Real-Time Clock (RTC)

? Receiver and synthesizer control

– Receiver control by software through general purpose I/Os

– Synthesizer control by software through general purpose I/Os

– 6-bit DAC for AFC to the receiver local oscillator

– Dedicated protocol timer.

? Decoding of paging data

– POCSAG or APOC phase 1; advanced high speed paging protocols are also supported

– Supported data rates: 1200, 1600, 2400, 3125 and 3200 symbols/s using a 76.8 kHz crystal oscillator

– Demodulation of Zero-IF I and Q, 4 or 2 level FSK input or direct data input

– Noise filtering of data input and symbol clock reconstruction

– De-interleaving, error checking and correction, sync word detection address recognition, buffering and more is performed by software

– All user functions (keypad interface, alerter control, display etc.) are implemented in software.

? Musical tone generator for beeper, controlled by the microcontroller

? Watchdog timer

? 48-pin LQFP package.