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NJ88C50NP中文資料ZARLINK數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

NJ88C50NP
廠商型號(hào)

NJ88C50NP

功能描述

Dual Low Power Frequency Synthesiser

文件大小

523.98 Kbytes

頁(yè)面數(shù)量

17 頁(yè)

生產(chǎn)廠商 Zarlink Semiconductor
企業(yè)簡(jiǎn)稱(chēng)

ZARLINK

中文名稱(chēng)

Zarlink Semiconductor官網(wǎng)

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數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-20 11:58:00

NJ88C50NP規(guī)格書(shū)詳情

Dual Low Power Frequency Synthesiser

The NJ88C50 is a low power integrated circuit, designed as the heart of a fast locking PLL subsystem in a mobile radio application. It is manufactured on Mitel Semiconductor 1.4 micron double polysilicon CMOS process, which ensures that low power and low noise performance is achieved. The device contains two synthesisers, one for the generation of VHF signals up to 125MHz and a second for UHF (when used with a mulitmodulus prescaler such as the SP8713/14/15). The main synthesiser has the capability of driving a dual speed loop filter and also can perform Fractional-N interpolation. Both synthesisers use current source outputs from their phase detectors to minimise external components. Various sections may be powered down for battery economy.

FEATURES

? 30MHz main synthesiser

? 125MHz auxiliary synthesiser

? Programmable output current from phase detector - up to 10mA

? High input sensitivity

? Fractional-N interpolator

? Supports up to 4 modulus prescalers

? SSOP package

APPLICATIONS

? NMT, AMPS, ETACS cellular

? GSM, IS-54, RCR-27 cellular

? DCS1800 microcellular

? DLMR, DSRR, TETRA

? DECT, PHP cordless telephones

產(chǎn)品屬性

  • 型號(hào):

    NJ88C50NP

  • 制造商:

    ZARLINK

  • 制造商全稱(chēng):

    Zarlink Semiconductor Inc

  • 功能描述:

    Dual Low Power Frequency Synthesiser

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