The MC74VHC74 is an advanced high speed CMOS D?type flip?flop fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.

The signal level applied to the D input is transferred to Q output during the positive going transition of the Clock pulse.

Reset (RD) and Set (SD) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low.

The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.

Features

? High Speed: fmax = 170MHz (Typ) at VCC = 5V

? Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C

? High Noise Immunity: VNIH = VNIL = 28 VCC

? Power Down Protection Provided on Inputs

? Balanced Propagation Delays

? Designed for 2.0 V to 5.5 V Operating Range

? Low Noise: VOLP = 0.8 V (Max)

? Pin and Function Compatible with Other Standard Logic Families

? Latchup Performance Exceeds 300 mA

? ESD Performance:

Human Body Model > 2000 V;

Machine Model > 200 V

? Chip Complexity: 128 FETs or 32 Equivalent Gates

? These Devices are Pb?Free and are RoHS Compliant

MC74VHC74DTR2屬于集成電路（IC） > 觸發(fā)器。安森美半導(dǎo)體公司制造生產(chǎn)的MC74VHC74DTR2觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號有不同的響應(yīng)，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。