MC74HC595ADR2G集成電路（IC）的移位寄存器規(guī)格書(shū)PDF中文資料

MC74HC595ADR2G屬于集成電路（IC）的移位寄存器。由安森美半導(dǎo)體公司制造生產(chǎn)的MC74HC595ADR2G移位寄存器移位寄存器是低級(jí)邏輯器件，通常用于在串行和并行方式之間轉(zhuǎn)換數(shù)字邏輯信號(hào)形式的數(shù)據(jù)，或在數(shù)字字內(nèi)移動(dòng)數(shù)據(jù)位的位置。移位寄存器通常使用集成到一個(gè)設(shè)備中的一組觸發(fā)器來(lái)實(shí)現(xiàn)，常用于集成度更高的邏輯器件，但仍可用于 I/O 擴(kuò)展等應(yīng)用，在這些應(yīng)用中離散形式的函數(shù)可能會(huì)非常有用。

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs

The MC74HC595A consists of an 8?bit shift register and an 8?bit D?type latch with three?state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8?bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register.

The HC595A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs.

Features

? Output Drive Capability: 15 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1.0 μA

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance with the Requirements Defined by JEDEC Standard No. 7A

? Chip Complexity: 328 FETs or 82 Equivalent Gates

? Improvements over HC595

? Improved Propagation Delays

? 50 Lower Quiescent Power

? Improved Input Noise and Latchup Immunity

? Pb?Free Packages are Available*