MC68HC05L9DSLASHH中文資料恩智浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

HARDW AREFEATURES

8-bit architecture

Power saving stop, wait modes

Low voltage inhibit for data protection

176 bytes of on-chip RAM (64 bytes for stack)

128 x 5-bit of on-chip display RAM

6K bytes of on chip ROM

27 bidirectional l/O and 2 input only lines

LCD ?ivercircuiσy with a selection of 1/16 or 1/8 multiplex and 40 segments drive

Capable to expand to 205 segments drive when connects to 3 MC68HC68L9 or 1 MC141510

16-bit address bus

8-bit bidirectional data bus

Int?nal 16-bit timer

Serial Communications Interface System

2 on-chip oscillators -- 1 RC osc. for MCU and 1 crystal osc. for real time clock and LCD driver

Self-check mode

128-pin QFP or in Die form