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MC34084DW中文資料安森美半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書

MC34084DW
廠商型號(hào)

MC34084DW

功能描述

HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS

文件大小

282.22 Kbytes

頁(yè)面數(shù)量

16 頁(yè)

生產(chǎn)廠商 ON Semiconductor
企業(yè)簡(jiǎn)稱

ONSEMI安森美半導(dǎo)體

中文名稱

安森美半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-7-21 14:13:00

人工找貨

MC34084DW價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨

MC34084DW規(guī)格書詳情

High Slew Rate, Wide Bandwidth, JFET Input Operational Amplifiers

These devices are a new generation of high speed JFET input monolithic operational amplifiers. Innovative design concepts along with JFET technology provide wide gain bandwidth product and high slew rate. Well–matched JFET input devices and advanced trim techniques ensure low input offset errors and bias currents. The all NPN output stage features large output voltage swing, no deadband crossover distortion, high capacitive drive capability, excellent phase and gain margins, low open loop output impedance, and symmetrical source/sink AC frequency response.

This series of devices is available in fully compensated or decompensated (AVCL≤2) and is specified over a commercial temperature range. They are pin compatible with existing Industry standard operational amplifiers, and allow the designer to easily upgrade the performance of existing designs.

? Wide Gain Bandwidth: 8.0 MHz for Fully Compensated Devices

16 MHz for Decompensated Devices

? High Slew Rate: 25 V/μs for Fully Compensated Devices

50 V/μs for Decompensated Devices

? High Input Impedance: 1012?

? Input Offset Voltage: 0.5 mV Maximum (Single Amplifier)

? Large Output Voltage Swing: –14.7 V to +14 V for

VCC/VEE = ±15 V

? Low Open Loop Output Impedance: 30 ? @ 1.0 MHz

? Low THD Distortion: 0.01

? Excellent Phase/Gain Margins: 55°/7.6 dB for Fully Compensated

Devices

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ON/安森美
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