The MC14049B Hex Inverter/Buffer and MC14050B Noninverting

Hex Buffer are constructed with MOS P?Channel and N?Channel

enhancement mode devices in a single monolithic structure. These

complementary MOS devices find primary use where low power

dissipation and/or high noise immunity is desired. These devices

provide logic level conversion using only one supply voltage, VDD.

The input?signal high level (VIH) can exceed the VDD supply

voltage for logic level conversions. Two TTL/DTL loads can be driven

when the devices are used as a CMOS?to?TTL/DTL converter

(VDD = 5.0 V, VOL ≤ 0.4 V, IOL ≥ 3.2 mA).

Note that pins 13 and 16 are not connected internally on these

devices; consequently connections to these terminals will not affect

circuit operation.

Features

? High Source and Sink Currents

? High?to?Low Level Converter

? Supply Voltage Range = 3.0 V to 18 V

? VIN can exceed VDD

? Meets JEDEC B Specifications

? Improved ESD Protection On All Inputs

? NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC?Q100

Qualified and PPAP Capable

? These Devices are Pb?Free and are RoHS Compliant

MC14050BDTR2G屬于集成電路（IC） > 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器。安森美半導(dǎo)體公司制造生產(chǎn)的MC14050BDTR2G緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對(duì)某個(gè)電路的邏輯信號(hào)的訪問，以用于另一電路。緩沖器將其輸入信號(hào)（不變或反相）傳遞到其輸出，并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。