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MACH215-12JC中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書

MACH215-12JC
廠商型號(hào)

MACH215-12JC

功能描述

High-Density EE CMOS Programmable Logic

文件大小

245.73 Kbytes

頁(yè)面數(shù)量

30 頁(yè)

生產(chǎn)廠商 Lattice Semiconductor
企業(yè)簡(jiǎn)稱

Lattice萊迪思

中文名稱

萊迪思半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-14 19:10:00

MACH215-12JC規(guī)格書詳情

GENERAL DESCRIPTION

The MACH215 is a member of the high-performance EE CMOS MACH device family. This device has approximately three times the capability of the popular PAL20RA10 without loss of speed. This device is designed for use in asynchronous as well as synchronous applications.

DISTINCTIVE CHARACTERISTICS

■ 44 Pins

■ 32 Output Macrocells

■ 32 Input Macrocells

■ Product terms for:

— Individual flip-flop clock

— Individual asynchronous reset, preset

— Individual output enable

■ 12 ns tPD Commercial 14.5 ns tPD Industrial

■ 67 MHz fCNT

■ 38 Inputs with pull-up resistors

■ 32 Outputs

■ 64 Flip-flops

■ For asynchronous and synchronous applications

■ 4 “PAL22RA8” blocks with buried macrocells

■ Pin-compatible with MACH110, MACH111, MACH210, and MACH211

產(chǎn)品屬性

  • 型號(hào):

    MACH215-12JC

  • 制造商:

    LATTICE

  • 制造商全稱:

    Lattice Semiconductor

  • 功能描述:

    High-Density EE CMOS Programmable Logic

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