M74HC393集成電路（IC）的計(jì)數(shù)器除法器規(guī)格書PDF中文資料

M74HC393屬于集成電路（IC）的計(jì)數(shù)器除法器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的M74HC393計(jì)數(shù)器，除法器計(jì)數(shù)器和除法器 IC 是數(shù)字邏輯器件，可對輸入發(fā)生的邏輯轉(zhuǎn)換進(jìn)行計(jì)數(shù)，然后使用多個并行輸出重新發(fā)送累加的計(jì)數(shù)，和/或生成單個輸出信號轉(zhuǎn)換，從而對應(yīng)用某些整數(shù)數(shù)量輸入信號轉(zhuǎn)換進(jìn)行響應(yīng)。除了簡單的事件計(jì)數(shù)，它們還可用于各種頻率合成應(yīng)用。

DESCRIPTION

The M54/74HC393 is a high speed CMOS DUAL BINARY COUNTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true COMS low power consumption.

This counter circuit contains independent ripple carry counters and two 4-bit ripple carry binary counters, which can be cascated to create a single divide by 256 counter.

Each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input,and each has an independent clear input. When clear is set to low all four bits of each counter are set to a low level. This enables count truncation and allows the implementation od divide by N counter configurations.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED fMAX = 72 MHz (TYP.) AT VCC = 5 V

■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT TA = 25 °C

■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS393