M74HC147M1R中文資料意法半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption.

This device features priority encoding of the inputs to ensure that only the highest order data line is encoded. Nine input lines are encoded to a four line BCD output. The implied decimal zero condition requires no input condition as zero is encoded when all nine datalinesare athigh logic level. Alldata input and outputs are active at the low logic level. All in puts are equipped with protection circuits against static discharge and transient excess voltage.

■ HIGH SPEED

tPD = 15 ns (TYP.) at VCC = 5 V

■ LOW POWER DISSIPATION

ICC = 4 μA (MAX.) at TA = 25 °C

■ HIGH NOISE IMMUNITY

VNIH = VNIL = 28 VCC (MIN.)

■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

■ SYMMETRICAL OUTPUT IMPEDANCE

?IOH? = IOL = 4 mA (MIN.)

■ BALANCED PROPAGATION DELAYS

tPLH = tPHL

■ WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V to 6 V

■ PIN AND FUNCTION COMPATIBLE WITH 54/74LS147