M74HC112B1R集成電路（IC）的觸發(fā)器規(guī)格書PDF中文資料

M74HC112B1R屬于集成電路（IC）的觸發(fā)器。由意法半導(dǎo)體集團制造生產(chǎn)的M74HC112B1R觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號有不同的響應(yīng)，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。

DESCRIPTION

The M54HC112 is an high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology.

The M54HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is high and the bistable will function as shown in the truth table. Input data is transferred to the input on the negative going edge of the clock pulse.

■ HIGH SPEED: fMAX = 79MHz (TYP.) at VCC = 6V

■ LOW POWER DISSIPATION: ICC =2μA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V

■ PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 112

■ SPACE GRADE-1: ESA SCC QUALIFIED

■ 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST

■ NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION

■ DEVICE FULLY COMPLIANT WITH SCC-9203-051