M28C17-120P6T中文資料意法半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The M28C17 is a 2K x 8 low power Parallel EEPROM fabricated with SGS-THOMSON prorietary single polysilicon CMOS technology. The evice offers fast access time with low power disipation and requires a 5V power supply. The M28C17 offers the same features than the M28C16, in addition to the Ready/Busy pin. The circuit has been designed to offer a flexible microcontroller interface featuring both hardware and software handshaking with Ready/Busy, Data Polling and Toggle Bit. The M28C17 supports 64 byte page write operation. A Software Data Protection (SDP) is also possible using the standard JEDEC algorithm.

FAST ACCESS TIME: 90ns

SINGLE 5V ±10 SUPPLY VOLTAGE

LOW POWER CONSUMPTION

FAST WRITE CYCLE:

– 64 Bytes Page Write Operation

– Byte or Page Write Cycle: 3ms Max

ENHANCED END OF WRITE DETECTION:

– Ready/Busy Open Drain Output

– Data Polling

– Toggle Bit

PAGE LOAD TIMER STATUS BIT

HIGH RELIABILITY SINGLE POLYSILICON,

CMOS TECHNOLOGY:

– Endurance >100,000 Erase/Write Cycles

– Data Retention >40 Years

JEDEC APPROVED BYTEWIDE PIN OUT

SOFTWARE DATA PROTECTION

M28C17 is replaced by the products described on the document M28C16A