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M12L128168A-6T中文資料晶豪科技數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

M12L128168A-6T
廠商型號(hào)

M12L128168A-6T

功能描述

2M x 16 Bit x 4 Banks Synchronous DRAM

文件大小

808.12 Kbytes

頁(yè)面數(shù)量

44 頁(yè)

生產(chǎn)廠商 Elite Semiconductor Memory Technology Inc.
企業(yè)簡(jiǎn)稱

ESMT晶豪科技

中文名稱

晶豪科技股份有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-1-15 16:40:00

M12L128168A-6T規(guī)格書(shū)詳情

GENERAL DESCRIPTION

The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

FEATURES

? JEDEC standard 3.3V power supply

? LVTTL compatible with multiplexed address

? Four banks operation

? MRS cycle with address key programs

- CAS Latency ( 2 & 3 )

- Burst Length ( 1, 2, 4, 8 & full page )

- Burst Type ( Sequential & Interleave )

? All inputs are sampled at the positive going edge of the system clock

? Burst Read single write operation

? DQM for masking

? Auto & self refresh

? 64ms refresh period (4K cycle)

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9860
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ESMT
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64
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MSMT
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320
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晶豪ESMT
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20000
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ESMT
TSOP54
893993
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