LU3X34FTR中文資料agere數(shù)據(jù)手冊PDF規(guī)格書

Overview

The LU3X34FTR is a fully integrated, 4-port 10/100 Mbits/s physical layer device with an integrated transceiver. This part was designed specifically for 10/100 Mbits/s switches. These applications typically require stringent functionality in addition to very tight board space, power, and cost requirements. The LU3X34FTR supports RMII and SMII interfaces, offering the designer multiple reduced pin count interfaces to save both real estate and cost in system design. The LU3X34FTR was designed from the beginning to conform fully with all pertinent specifications, from the ISO1/IEC2 11801 and EIA3/TIA 568 cabling guidelines to ANSI4 X3.263TP-PMD to IEEE5 802.3 Ethernet specifications.

Features

■ 4-port, single-chip, integrated physical layer and transceivers for 10Base-T, 100Base-TX, or 100Base-FX functions.

■ IEEE 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD compatible transceiver.

■ Interface support for RMII and SMII switch applications.

■ Autonegotiation pin configurability on a per-port basis.

■ FX mode configurable on a per-port basis.

■ Built-in analog 10 Mbit receive filter, removing the need for external filters.

■ Built-in 10 bit transmit filter.

■ 10 Mbit PLL, exceeding tolerances for both preamble and data jitter.

■ 100 Mbit PLL, combined with the digital adaptive equalizer, robustly handles variations in rise-fall time, excessive attenuation due to channel loss, duty-cycle distortion, crosstalk, and baseline wander.

■ Transmit rise-fall time manipulated to provide lower emissions, amplitude fully compatible for proper interoperability.

■ Programmable scrambler seed for better FCC compliancy.

■ IEEE 802.3u Clause 28 compliant autonegotiation for full 10 Mbits/s and 100 Mbits/s control.

■ Extended management support with interrupt capabilities.

■ PHY MIB support.

■ Low-power 500 mA max.

— Low-cost 128-pin SQFP packaging with heat spreader.