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LH540203U-15中文資料夏普微數(shù)據(jù)手冊(cè)PDF規(guī)格書

LH540203U-15
廠商型號(hào)

LH540203U-15

功能描述

CMOS 2048X9 ASYNCHRONOUS FIFO

文件大小

156.25 Kbytes

頁面數(shù)量

17

生產(chǎn)廠商 Sharp Microelectronics of the Americas (SMA)
企業(yè)簡(jiǎn)稱

SHARP夏普微

中文名稱

美國(guó)夏普微電子公司(SMA)官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-1-26 16:10:00

LH540203U-15規(guī)格書詳情

FUNCTIONAL DESCRIPTION

The LH540203 is a FIFO (First-In, First-Out) memory device, based on fully-static CMOS dual-port SRAM technology, capable of storing up to 2048 nine-bit words. It follows the industry-standard architecture and package pinouts for nine-bit asynchronous FIFOs. Each nine-bit LH540203 word may consist of a standard eight-bit byte, together with a parity bit or a block-marking/framing bit.

FEATURES

? Fast Access Times: 15/20/25/35/50 ns

? Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology

? Input Port and Output Port Have Entirely Independent Timing

? Expandable in Width and Depth

? Full, Half-Full, and Empty Status Flags

? Data Retransmission Capability

? TTL-Compatible I/O

? Pin and Functionally Compatible with Sharp LH5498 and with Am/IDT/MS7203

? Control Signals Assertive-LOW for Noise Immunity

? Packages:

28-Pin, 300-mil PDIP

28-Pin, 300-mil SOJ *

32-Pin PLCC

產(chǎn)品屬性

  • 型號(hào):

    LH540203U-15

  • 制造商:

    SHARP

  • 制造商全稱:

    Sharp Electrionic Components

  • 功能描述:

    CMOS 2048X9 ASYNCHRONOUS FIFO

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