L29C520中文資料LODEV數(shù)據(jù)手冊(cè)PDF規(guī)格書
L29C520規(guī)格書詳情
DESCRIPTION
The L29C520 and L29C521 are pin for-pin compatible with the IDT29FCT520/IDT29FCT521 and AMD Am29520/Am29521, implemented in low power CMOS.
The L29C520 and L29C521 contain four registers which can be configured as two independent, 2-level pipelines or as one 4-level pipeline.
The Instruction pins, I1-0, control the loading of the registers. For either device, the registers may be configured as a four-stage delay line, with data loaded into R1 and shifted sequentially through R2, R3, and R4. Also, for the L29C520, data may be loaded from the inputs into either R1 or R3 with only R2 or R4 shifting. The L29C521 differs from the L29C520 in that R2 and R4 remain unchanged during this type of data load, as shown in Tables 1 and 2. Finally, I1-0 may be set to prevent any register from changing.
FEATURES
? Four 8-bit Registers
? Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline Register
? Hold, Shift, and Load Instructions
? Separate Data In and Data Out Pins
? High-Speed, Low Power CMOS Technology
? Three-State Outputs
? Replaces IDT29FCT520/IDT29FCT521 and AMD Am29520/Am29521
? Package Styles Available:
? 24-pin PDIP
? 28-pin PLCC, J-Lead
產(chǎn)品屬性
- 型號(hào)：
L29C520
- 制造商：
LOGIC
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
LOGIC |
87+ |
DIP/24 |
30 |
原裝現(xiàn)貨海量庫存歡迎咨詢 |
詢價(jià) | ||
KOREA |
24+ |
DIP |
2000 |
詢價(jià) | |||
LOGIC |
24+ |
12 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | |||
LOGIC |
24+ |
DIP24 |
16800 |
絕對(duì)原裝進(jìn)口現(xiàn)貨,假一賠十,價(jià)格優(yōu)勢(shì)!? |
詢價(jià) | ||
Cirrus Logic |
23+ |
標(biāo)準(zhǔn)封裝 |
10000 |
正規(guī)渠道,只有原裝! |
詢價(jià) | ||
LOGIC |
2402+ |
DIP24 |
8324 |
原裝正品!實(shí)單價(jià)優(yōu)! |
詢價(jià) | ||
LOGIC |
22+23+ |
CDIP |
38639 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
LOGIC |
23+ |
CDIP24 |
8650 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣! |
詢價(jià) | ||
LOGIC |
2023+ |
3000 |
進(jìn)口原裝現(xiàn)貨 |
詢價(jià) | |||
22+ |
5000 |
詢價(jià) |
