IDT74FCT162511AT中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION:

The FCT162511AT/CT 16-bit registered/latched transceiver with parity is built using advanced dual metal CMOS technology.

FEATURES:

? 0.5 MICRON CMOS Technology

? Typical tsk(o) (Output Skew) < 250ps, clocked mode

? Low input and output leakage ≤1μA (max)

? ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

? Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,

15.7 mil pitch TVSOP and 25 mil pitch Cerpack

? Extended commercial range of –40°C to +85°C

? VCC = 5V ±10

? Balanced Output Drivers: ±24mA (commercial)

±16mA (military)

? Series current limiting resistors

? Generate/Check, Check/Check modes

? Open drain parity error allows wire-OR