DESCRIPTION:

This 20-bit buffer/driver is built using advanced dual metal CMOS technology. The ALVCH162827 device provides high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flow-through organization of signal pins facilitates ease of layout. All inputs are designed with hysteresis for improved noise margin.

FEATURES:

? 0.5 MICRON CMOS Technology

? Typical tSK(o) (Output Skew) < 250ps

? ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

? VCC = 3.3V ± 0.3V, Normal Range

? VCC = 2.7V to 3.6V, Extended Range

? VCC = 2.5V ± 0.2V

? CMOS power levels (0.4μ W typ. static)

? Rail-to-Rail output swing for increased noise margin

? Available in TSSOP package

DRIVE FEATURES:

? Balanced Output Drivers: ±12mA

? Low switching noise

APPLICATIONS:

? 3.3V high speed systems

? 3.3V and lower voltage computing systems