IDT72521L50J中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION:

The IDT72511 and IDT72521 are highly integrated first-in, first-out memories that enhance processor-to-processor and processor-to-peripheral communications. IDT BiFIFOs integrate two side-by-side memory arrays for data transfers in two directions.

FEATURES:

? Two side-by-side FIFO memory arrays for bidirectional

data transfers

? 512 x 18-Bit - 512 x 18-Bit (IDT72511)

? 1024 x 18-Bit - 1024 x 18-Bit (IDT72521)

? 18-bit data buses on Port A side and Port B side

? Can be configured for 18-to-18-bit or 36-to-36-bit communication

? Fast 35ns access time

? Fully programmable standard microprocessor interface

? Built-in bypass path for direct data transfer between two

ports

? Two fixed flags, Empty and Full, for both the A-to-B and

the B-to-A FIFO

? Two programmable flags, Almost-Empty and Almost-Full

for each FIFO

? Programmable flag offset can be set to any depth in the

FIFO

? Any of the eight flags can be assigned to four external

flag pins

? Flexible reread/rewrite capabilities

? Six general-purpose programmable I/O pins

? Standard DMA control pins for data exchange with

peripherals

? 68-pin PGA and PLCC packages