ICS615MT中文資料華潤微電子數(shù)據(jù)手冊PDF規(guī)格書

Description

The ICS615 is a low cost, low jitter, high performance PLL clock synthesizer designed to replace 13.5, 27, and 54MHz crystals and oscillators. Using analog/digital Phase-Locked Loop (PLL) techniques, the device uses an inexpensive external 13.5 MHz crystal or clock input to produce output clocks of 13.5 MHz, 27 MHz, and 54 MHz .

Features

? Packaged in 8 pin narrow SOIC

? Output clocks of 54, 27, and 13.5MHz

? Uses a 13.500 MHz clock or external crystal

? Full CMOS outputs with 25mA output drive capability at TTL levels

? Low skew outputs

? Advanced, low power, sub-micron CMOS process

? +3.3V or +5V operating voltage

? See the MK2720 for these frequencies plus the VCXO function, in an 8 pin SOIC.