首頁(yè)>IC61S51218T-200TQ>規(guī)格書(shū)詳情
IC61S51218T-200TQ中文資料ICSI數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
相關(guān)芯片規(guī)格書(shū)
更多- IC61S51218D-133TQ
- IC61S25636T-166TQ
- IC61S51218D
- IC61S51218D-166TQI
- IC61S51218D-250TQ
- IC61S25636T-250TQI
- IC61S25636T-133TQI
- IC61S51218D-133B
- IC61S25636T-250TQ
- IC61S25636T-200TQI
- IC61S25636T-200TQ
- IC61S25636T-166TQI
- IC61S51218D-250TQI
- IC61S51218D-200TQI
- IC61S51218T-166TQI
- IC61S51218T-166TQ
- IC61S51218T-133TQ
- IC61S51218D-250B
IC61S51218T-200TQ規(guī)格書(shū)詳情
DESCRIPTION
ICSIs 8Mb SyncBurst Pipelined SRAMs integrate a 512k x 18, 256k x 32, or 256k x 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter.
FEATURES
? Pipeline Mode operation
? Single/Dual Cycl Deselect
? User-selectable Output Drive Strength with XQ Mode
? Internal self-timed write cycle
? Individual Byte Write Control and Global Write
? Clock controlled, registered address, data and control
? Pentium? or linear burst sequence control using MODE input
? Common data inputs and data outputs
? JEDEC 100-Pin TQFP and 119-pin PBGA package
? Single +3.3V, +10, –5 core power supply
? Power-down snooze mode
? 2.5V or 3.3V I/O Supply
? Snooze MODE for reduced-power standby
? T version (three chip selects)
? D version (two chip selects)
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
ICSI |
22+23+ |
原廠原包 |
24139 |
絕對(duì)原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨 |
詢(xún)價(jià) | ||
ICSI |
23+ |
QFP |
3000 |
一級(jí)代理原廠VIP渠道,專(zhuān)注軍工、汽車(chē)、醫(yī)療、工業(yè)、 |
詢(xún)價(jià) | ||
ICSI |
23+ |
NA |
19960 |
只做進(jìn)口原裝,終端工廠免費(fèi)送樣 |
詢(xún)價(jià) |
