HS9-80C86RH-Q中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

The Intersil HS-80C86RH high performance radiation hardened 16-bit CMOS CPU is manufactured using a hardened field, self aligned silicon gate CMOS process. Two modes of operation, MINimum for small systems and MAXimum for larger applications such as multiprocessing, allow user configuration to achieve the highest performance level. Industry standard operation allows use of existing NMOS 8086 hardware and software designs.

Features

? Electrically Screened to SMD # 5962-95722

? QML Qualified per MIL-PRF-38535 Requirements

? Radiation Performance

- Latch Up Free EPl-CMOS

- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)

- Transient Upset. . . . . . . . . . . . . . . . . . . . >108 rad(Si)/s

? Low Power Operation

- ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . 500μA (Max)

- ICCOP . . . . . . . . . . . . . . . . . . . . . . . 12mA/MHz (Max)

? Pin Compatible with NMOS 8086 and Intersil 80C86

? Completely Static Design DC to 5MHz

? 1MB Direct Memory Addressing Capability

? 24 Operand Addressing Modes

? Bit, Byte, Word, and Block Move Operations

? 8-Bit and 16-Bit Signed/Unsigned Arithmetic

- Binary or Decimal

- Multiply and Divide

? Bus-Hold Circuitry Eliminates Pull-up Resistors for CMOS Designs

? Hardened Field, Self-Aligned, Junction-Isolated CMOS Process

? Single 5V Power Supply

? Military Temperature Range . . . . . . . . . . . -35oC to 125oC

? Minimum LET for Single Event Upset . . . . . . . . . . . . . 6MEV/mg/cm2 (Typ)