HMA510中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

Description

The HMA510 is a high speed, low power CMOS 16 x 16-bit parallel multiplier accumulator capable of operating at 45ns clocked multiply-accumulate cycles. The 16-bit X and Y operands may be specified as either two’s complement or unsigned magnitude format. Additional inputs are provided for the accumulator functions which include: loading the accumulator with the current product, adding or subtracting the accumulator contents and the current product, and preloading the Accumulator Registers from the external inputs.

Features

? 16 x 16-Bit Parallel Multiplication with Accumulation to a 35-Bit Result

? High-Speed (45ns) Multiply Accumulate Time

? Low Power CMOS Operation

- ICCSB = 500μA Maximum

- ICCOP = 7.0mA Maximum at 1.0MHz

? HMA510 is Compatible with the CY7C510 and the IDT7210

? Supports Two’s Complement or Unsigned Magnitude Operations

? TTL Compatible Inputs/Outputs

? Three-State Outputs