HEF4042BN中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書
HEF4042BN規(guī)格書詳情
DESCRIPTION
The HEF4042B is a 4-bit latch with four data inputs (D0 to D3), four buffered latch outputs (O0 to O3), four buffered complementary latch outputs (O0 to O3) and two common enable inputs (E0 and E1). Information on D0 to D3 is transferred to O0 to O3 while both E0 and E1 are in the same state, either HIGH or LOW. O0 to O3 follow D0 to D3 as long as both E0 and E1 remain in the same state. When E0 and E1 are different, D0 to D3 do not affect O0 to O3 and the information in the latch is stored. O0 to O3 are always the complement of O0 to O3. The exclusive-OR input structure allows the choice of either polarity for E0 and E1. With one enable input HIGH, the other enable input is active HIGH; with one enable input LOW, the other enable input is active LOW.
APPLICATION INFORMATION
Some examples of applications for the HEF4042B are:
? Buffer storage
? Holding register
產(chǎn)品屬性
- 型號(hào)：
HEF4042BN
- 制造商：
PHILIPS
- 制造商全稱：
NXP Semiconductors
- 功能描述：
Quadruple D-latch
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
NXP/恩智浦 |
22+ |
DIP16 |
2259 |
只做原裝公司現(xiàn)貨! |
詢價(jià) | ||
NXP/恩智浦 |
1922+ |
DIP16 |
6852 |
只做原裝正品現(xiàn)貨!或訂貨假一賠十! |
詢價(jià) | ||
PHILI |
22+ |
DIP |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢價(jià) | ||
PHSSEMICONDUCTOR |
2020+ |
NA |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
PHILIPS/飛利浦 |
23+ |
10000 |
原廠授權(quán)一級(jí)代理,專業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢價(jià) | |||
PHI |
24+ |
DIP-14P |
2560 |
絕對(duì)原裝!現(xiàn)貨熱賣! |
詢價(jià) | ||
NXP |
23+ |
SOP |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
PHILI |
2021+ |
DIP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
NXP/恩智浦 |
23+ |
DIP16 |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
PHILIPS |
22+23+ |
SMD |
29863 |
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) |
