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HD74LS374FPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

HD74LS374FPEL
廠商型號(hào)

HD74LS374FPEL

功能描述

Octal D-type Edge-triggered Flip-Flops (with three-state outputs)

文件大小

96.31 Kbytes

頁(yè)面數(shù)量

8 頁(yè)

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-20 22:51:00

HD74LS374FPEL規(guī)格書(shū)詳情

The HD74LS374, 8-bit register features totem-pole three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide this register with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops are edge-triggered D-type flip

flops. On the positive transition the clock, the Q outputs will be set to the logic states that ware setup at the D inputs.

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