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HD74HC573RPEL中文資料瑞薩數(shù)據(jù)手冊(cè)PDF規(guī)格書

HD74HC573RPEL
廠商型號(hào)

HD74HC573RPEL

功能描述

Octal Transparent Latches (with 3-state outputs)

文件大小

138.73 Kbytes

頁面數(shù)量

11

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-4-12 23:00:00

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HD74HC573RPEL規(guī)格書詳情

Description

When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.

Features

? High Speed Operation: tpd(Data to Q, Q) = 11 ns typ (CL= 50 pF)

? High Output Current: Fanout of 15 LSTTL Loads

? Wide Operating Voltage: VCC= 2 to 6 V

? Low Input Current: 1 μA max

? Low Quiescent Supply Current: ICC(static) = 4 μA max (Ta = 25°C)

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
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24+
NA/
3345
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詢價(jià)
N/A
23+
SOP
6500
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TI
2020+
SOIC-20
80000
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詢價(jià)
HIT
24+
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20000
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詢價(jià)
HIT
06+
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200
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HIT
06+
SOP20
2360
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HIT
23+
SOP5.2mm
56483
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23+
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3532
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RENESAS
21+
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95
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25+23+
SOP5.2
66774
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