H27S4G8_6F2D中文資料海力士數(shù)據(jù)手冊PDF規(guī)格書

Summary Description

H27(U_S)4G8_6F2D series is a 512Mx8bit with spare 16Mx8 bit capacity. The device is offered in 3.0/1.8 Vcc Power Supply, and with x8 and x16 I/O interface Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased.

The device contains 4096 blocks, composed by 64 pages. Memory array is split into 2 planes, each of them consisting of 2048 blocks. Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in typical 200us(3.3V) and an erase operation can be performed in typical 3.5ms on a 128K-byte block. In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture allows program

time to be reduced by 40 and erase time to be reduction by 50. In case of multi-plane operation, there is small degradation at 1.8V application in terms of program/erase time.