GTL2014PW中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

General description

The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL?/GTL/GTL+ bus.

The direction pin allows the part to function as either a GTL to LVTTL sampling receiver or as a LVTTL to GTL interface.

The GTL2014 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS inputs. The LVTTL outputs are not 5.5 V tolerant.

The GTL2014 GTL inputs and outputs operate up to 3.6 V, allowing the device to be used in higher voltage open-drain output applications.

Features

■ Operates as a 4-bit GTL?/GTL/GTL+ sampling receiver or as a LVTTL to GTL?/GTL/GTL+ driver

■ 3.0 V to 3.6 V operation with 5 V tolerant LVTTL input

■ GTL input and output 3.6 V tolerant

■ Vref adjustable from 0.5 V to VCC/2

■ Partial power-down permitted

■ ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-CC101

■ Latch-up protection exceeds 500 mA per JESD78

■ Package offered: TSSOP14